A number of master devices may access a shared resource (also known as a slave device) such as memory via an interconnect. If some of the master devices have a local cache then it is possible that, after modifying data retrieved from memory, the modified version of that data can be stored in a local cache rather than being stored back to memory. However, this can cause problems if another master device needs to access the data. In particular if that master device accesses the version of the data stored in memory then the master device will be operating on out-of-date data, leading to a lack of coherency in the master device's view of the memory system. In order to reduce such problems, a coherency protocol may be implemented in order to dictate the behaviour of particular devices in a system such that all master devices have a coherent view of data.
A software controller, somewhere in the system, may take charge of the process of connecting to or disconnecting a master device from the system in such a way that the system remains coherent. Such a software controller may require the use of expensive communication between hardware and software components in order to complete the connection or disconnection process.